Wafer-level packaging, CMOS circuits and MOEMS technologies help realize sub-1-mm camera modules. 

Imaging and small-sized digital camera modules have become ubiquitous. Only a few years ago, a digital camera recorder was still a considerable investment, and its size and weight made users consider whether to drag it along or not. Today, the presence of digital cameras everywhere seems self-evident. Smartphones usually implement more than one camera, and game consoles are gearing up to combine video, digital stills and 3-D interaction with the total gaming experience, resulting in four or more cameras per device. 

The expansion of cameras has only been possible by their miniaturization, both in size and in cost. As with many innovations in the electronics business, the engine behind driving down size and cost, as well as increasing performance, comes from the semiconductor manufacturing industry’s Moore’s law, which predicts that the size of transistors will halve – and, consequently, performance of integrated semiconductor devices will double – every 1.5 years. The outcome of this race to ever-smaller and better-performing digital processor and memory chips can be applied to digital imaging, making it now possible to realize image sensors with pixels as small as 1 μm. This is driven mainly by the consumer electronics industry, where 1.1-μm pixel size is in mass production and some companies are already working on 0.9-μm pixels. 

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